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ksteube |
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void blockpapi_addEvent(int event, char *description); |
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void blockpapi_start(); |
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void blockpapi_stop(); |
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void blockpapi_writeReport(); |
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long long *blockpapi_getValues(); |
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void blockpapi_writeSystemInfo(); |
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/* These define NATV_the event codes for all the native events listed by native_avail */ |
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#define NATV_ALAT_CAPACITY_MISS_ALL 0x40000000 |
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#define NATV_ALAT_CAPACITY_MISS_FP 0x40000001 |
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#define NATV_ALAT_CAPACITY_MISS_INT 0x40000002 |
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#define NATV_BACK_END_BUBBLE_ALL 0x40000003 |
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#define NATV_BACK_END_BUBBLE_FE 0x40000004 |
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#define NATV_BACK_END_BUBBLE_L1D_FPU_RSE 0x40000005 |
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#define NATV_BE_BR_MISPRED_DETAIL_ANY 0x40000006 |
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#define NATV_BE_BR_MISPRED_DETAIL_PFS 0x40000007 |
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#define NATV_BE_BR_MISPRED_DETAIL_ROT 0x40000008 |
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#define NATV_BE_BR_MISPRED_DETAIL_STG 0x40000009 |
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#define NATV_BE_EXE_BUBBLE_ALL 0x4000000a |
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#define NATV_BE_EXE_BUBBLE_ARCR 0x4000000b |
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#define NATV_BE_EXE_BUBBLE_ARCR_PR_CANCEL_BANK 0x4000000c |
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#define NATV_BE_EXE_BUBBLE_BANK_SWITCH 0x4000000d |
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#define NATV_BE_EXE_BUBBLE_CANCEL 0x4000000e |
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#define NATV_BE_EXE_BUBBLE_FRALL 0x4000000f |
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#define NATV_BE_EXE_BUBBLE_GRALL 0x40000010 |
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#define NATV_BE_EXE_BUBBLE_GRGR 0x40000011 |
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#define NATV_BE_EXE_BUBBLE_PR 0x40000012 |
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#define NATV_BE_FLUSH_BUBBLE_ALL 0x40000013 |
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#define NATV_BE_FLUSH_BUBBLE_BRU 0x40000014 |
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#define NATV_BE_FLUSH_BUBBLE_XPN 0x40000015 |
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#define NATV_BE_L1D_FPU_BUBBLE_ALL 0x40000016 |
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#define NATV_BE_L1D_FPU_BUBBLE_FPU 0x40000017 |
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#define NATV_BE_L1D_FPU_BUBBLE_L1D 0x40000018 |
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#define NATV_BE_L1D_FPU_BUBBLE_L1D_DCS 0x40000019 |
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#define NATV_BE_L1D_FPU_BUBBLE_L1D_DCURECIR 0x4000001a |
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#define NATV_BE_L1D_FPU_BUBBLE_L1D_FILLCONF 0x4000001b |
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#define NATV_BE_L1D_FPU_BUBBLE_L1D_FULLSTBUF 0x4000001c |
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#define NATV_BE_L1D_FPU_BUBBLE_L1D_HPW 0x4000001d |
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#define NATV_BE_L1D_FPU_BUBBLE_L1D_L2BPRESS 0x4000001e |
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#define NATV_BE_L1D_FPU_BUBBLE_L1D_LDCHK 0x4000001f |
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#define NATV_BE_L1D_FPU_BUBBLE_L1D_LDCONF 0x40000020 |
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#define NATV_BE_L1D_FPU_BUBBLE_L1D_NAT 0x40000021 |
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#define NATV_BE_L1D_FPU_BUBBLE_L1D_NATCONF 0x40000022 |
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#define NATV_BE_L1D_FPU_BUBBLE_L1D_STBUFRECIR 0x40000023 |
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#define NATV_BE_L1D_FPU_BUBBLE_L1D_TLB 0x40000024 |
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#define NATV_BE_LOST_BW_DUE_TO_FE_ALL 0x40000025 |
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#define NATV_BE_LOST_BW_DUE_TO_FE_BI 0x40000026 |
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#define NATV_BE_LOST_BW_DUE_TO_FE_BRQ 0x40000027 |
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#define NATV_BE_LOST_BW_DUE_TO_FE_BR_ILOCK 0x40000028 |
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#define NATV_BE_LOST_BW_DUE_TO_FE_BUBBLE 0x40000029 |
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#define NATV_BE_LOST_BW_DUE_TO_FE_FEFLUSH 0x4000002a |
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#define NATV_BE_LOST_BW_DUE_TO_FE_FILL_RECIRC 0x4000002b |
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#define NATV_BE_LOST_BW_DUE_TO_FE_IBFULL 0x4000002c |
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#define NATV_BE_LOST_BW_DUE_TO_FE_IMISS 0x4000002d |
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#define NATV_BE_LOST_BW_DUE_TO_FE_PLP 0x4000002e |
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#define NATV_BE_LOST_BW_DUE_TO_FE_TLBMISS 0x4000002f |
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#define NATV_BE_LOST_BW_DUE_TO_FE_UNREACHED 0x40000030 |
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#define NATV_BE_RSE_BUBBLE_ALL 0x40000031 |
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#define NATV_BE_RSE_BUBBLE_AR_DEP 0x40000032 |
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#define NATV_BE_RSE_BUBBLE_BANK_SWITCH 0x40000033 |
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#define NATV_BE_RSE_BUBBLE_LOADRS 0x40000034 |
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#define NATV_BE_RSE_BUBBLE_OVERFLOW 0x40000035 |
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#define NATV_BE_RSE_BUBBLE_UNDERFLOW 0x40000036 |
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#define NATV_BRANCH_EVENT 0x40000037 |
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#define NATV_BR_MISPRED_DETAIL_ALL_ALL_PRED 0x40000038 |
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#define NATV_BR_MISPRED_DETAIL_ALL_CORRECT_PRED 0x40000039 |
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#define NATV_BR_MISPRED_DETAIL_ALL_WRONG_PATH 0x4000003a |
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#define NATV_BR_MISPRED_DETAIL_ALL_WRONG_TARGET 0x4000003b |
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#define NATV_BR_MISPRED_DETAIL_IPREL_ALL_PRED 0x4000003c |
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#define NATV_BR_MISPRED_DETAIL_IPREL_CORRECT_PRED 0x4000003d |
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#define NATV_BR_MISPRED_DETAIL_IPREL_WRONG_PATH 0x4000003e |
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#define NATV_BR_MISPRED_DETAIL_IPREL_WRONG_TARGET 0x4000003f |
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#define NATV_BR_MISPRED_DETAIL_NTRETIND_ALL_PRED 0x40000040 |
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#define NATV_BR_MISPRED_DETAIL_NTRETIND_CORRECT_PRED 0x40000041 |
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#define NATV_BR_MISPRED_DETAIL_NTRETIND_WRONG_PATH 0x40000042 |
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#define NATV_BR_MISPRED_DETAIL_NTRETIND_WRONG_TARGET 0x40000043 |
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#define NATV_BR_MISPRED_DETAIL_RETURN_ALL_PRED 0x40000044 |
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#define NATV_BR_MISPRED_DETAIL_RETURN_CORRECT_PRED 0x40000045 |
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#define NATV_BR_MISPRED_DETAIL_RETURN_WRONG_PATH 0x40000046 |
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#define NATV_BR_MISPRED_DETAIL_RETURN_WRONG_TARGET 0x40000047 |
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#define NATV_BR_MISPRED_DETAIL2_ALL_ALL_UNKNOWN_PRED 0x40000048 |
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#define NATV_BR_MISPRED_DETAIL2_ALL_UNKNOWN_PATH_CORRECT_PRED 0x40000049 |
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#define NATV_BR_MISPRED_DETAIL2_ALL_UNKNOWN_PATH_WRONG_PATH 0x4000004a |
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#define NATV_BR_MISPRED_DETAIL2_IPREL_ALL_UNKNOWN_PRED 0x4000004b |
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#define NATV_BR_MISPRED_DETAIL2_IPREL_UNKNOWN_PATH_CORRECT_PRED 0x4000004c |
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#define NATV_BR_MISPRED_DETAIL2_IPREL_UNKNOWN_PATH_WRONG_PATH 0x4000004d |
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#define NATV_BR_MISPRED_DETAIL2_NRETIND_ALL_UNKNOWN_PRED 0x4000004e |
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#define NATV_BR_MISPRED_DETAIL2_NRETIND_UNKNOWN_PATH_CORRECT_PRED 0x4000004f |
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#define NATV_BR_MISPRED_DETAIL2_NRETIND_UNKNOWN_PATH_WRONG_PATH 0x40000050 |
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#define NATV_BR_MISPRED_DETAIL2_RETURN_ALL_UNKNOWN_PRED 0x40000051 |
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#define NATV_BR_MISPRED_DETAIL2_RETURN_UNKNOWN_PATH_CORRECT_PRED 0x40000052 |
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#define NATV_BR_MISPRED_DETAIL2_RETURN_UNKNOWN_PATH_WRONG_PATH 0x40000053 |
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#define NATV_BR_PATH_PRED_ALL_MISPRED_NOTTAKEN 0x40000054 |
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#define NATV_BR_PATH_PRED_ALL_MISPRED_TAKEN 0x40000055 |
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#define NATV_BR_PATH_PRED_ALL_OKPRED_NOTTAKEN 0x40000056 |
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#define NATV_BR_PATH_PRED_ALL_OKPRED_TAKEN 0x40000057 |
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#define NATV_BR_PATH_PRED_IPREL_MISPRED_NOTTAKEN 0x40000058 |
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#define NATV_BR_PATH_PRED_IPREL_MISPRED_TAKEN 0x40000059 |
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#define NATV_BR_PATH_PRED_IPREL_OKPRED_NOTTAKEN 0x4000005a |
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#define NATV_BR_PATH_PRED_IPREL_OKPRED_TAKEN 0x4000005b |
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#define NATV_BR_PATH_PRED_NRETIND_MISPRED_NOTTAKEN 0x4000005c |
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#define NATV_BR_PATH_PRED_NRETIND_MISPRED_TAKEN 0x4000005d |
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#define NATV_BR_PATH_PRED_NRETIND_OKPRED_NOTTAKEN 0x4000005e |
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#define NATV_BR_PATH_PRED_NRETIND_OKPRED_TAKEN 0x4000005f |
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#define NATV_BR_PATH_PRED_RETURN_MISPRED_NOTTAKEN 0x40000060 |
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#define NATV_BR_PATH_PRED_RETURN_MISPRED_TAKEN 0x40000061 |
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#define NATV_BR_PATH_PRED_RETURN_OKPRED_NOTTAKEN 0x40000062 |
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#define NATV_BR_PATH_PRED_RETURN_OKPRED_TAKEN 0x40000063 |
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#define NATV_BR_PATH_PRED2_ALL_UNKNOWNPRED_NOTTAKEN 0x40000064 |
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#define NATV_BR_PATH_PRED2_ALL_UNKNOWNPRED_TAKEN 0x40000065 |
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#define NATV_BR_PATH_PRED2_IPREL_UNKNOWNPRED_NOTTAKEN 0x40000066 |
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#define NATV_BR_PATH_PRED2_IPREL_UNKNOWNPRED_TAKEN 0x40000067 |
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#define NATV_BR_PATH_PRED2_NRETIND_UNKNOWNPRED_NOTTAKEN 0x40000068 |
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#define NATV_BR_PATH_PRED2_NRETIND_UNKNOWNPRED_TAKEN 0x40000069 |
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#define NATV_BR_PATH_PRED2_RETURN_UNKNOWNPRED_NOTTAKEN 0x4000006a |
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#define NATV_BR_PATH_PRED2_RETURN_UNKNOWNPRED_TAKEN 0x4000006b |
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#define NATV_BUS_ALL_ANY 0x4000006c |
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#define NATV_BUS_ALL_IO 0x4000006d |
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#define NATV_BUS_ALL_SELF 0x4000006e |
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#define NATV_BUS_BACKSNP_REQ_THIS 0x4000006f |
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#define NATV_BUS_BRQ_LIVE_REQ_HI 0x40000070 |
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#define NATV_BUS_BRQ_LIVE_REQ_LO 0x40000071 |
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#define NATV_BUS_BRQ_REQ_INSERTED 0x40000072 |
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#define NATV_BUS_DATA_CYCLE 0x40000073 |
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#define NATV_BUS_HITM 0x40000074 |
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#define NATV_BUS_IO_ANY 0x40000075 |
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#define NATV_BUS_IO_IO 0x40000076 |
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#define NATV_BUS_IO_SELF 0x40000077 |
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#define NATV_BUS_IOQ_LIVE_REQ_HI 0x40000078 |
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#define NATV_BUS_IOQ_LIVE_REQ_LO 0x40000079 |
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#define NATV_BUS_LOCK_ANY 0x4000007a |
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#define NATV_BUS_LOCK_SELF 0x4000007b |
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#define NATV_BUS_MEMORY_ALL_ANY 0x4000007c |
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#define NATV_BUS_MEMORY_ALL_IO 0x4000007d |
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#define NATV_BUS_MEMORY_ALL_SELF 0x4000007e |
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#define NATV_BUS_MEMORY_EQ_128BYTE_ANY 0x4000007f |
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#define NATV_BUS_MEMORY_EQ_128BYTE_IO 0x40000080 |
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#define NATV_BUS_MEMORY_EQ_128BYTE_SELF 0x40000081 |
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#define NATV_BUS_MEMORY_LT_128BYTE_ANY 0x40000082 |
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#define NATV_BUS_MEMORY_LT_128BYTE_IO 0x40000083 |
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#define NATV_BUS_MEMORY_LT_128BYTE_SELF 0x40000084 |
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#define NATV_BUS_MEM_READ_ALL_ANY 0x40000085 |
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#define NATV_BUS_MEM_READ_ALL_IO 0x40000086 |
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#define NATV_BUS_MEM_READ_ALL_SELF 0x40000087 |
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#define NATV_BUS_MEM_READ_BIL_ANY 0x40000088 |
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#define NATV_BUS_MEM_READ_BIL_IO 0x40000089 |
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#define NATV_BUS_MEM_READ_BIL_SELF 0x4000008a |
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#define NATV_BUS_MEM_READ_BRIL_ANY 0x4000008b |
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#define NATV_BUS_MEM_READ_BRIL_IO 0x4000008c |
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#define NATV_BUS_MEM_READ_BRIL_SELF 0x4000008d |
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#define NATV_BUS_MEM_READ_BRL_ANY 0x4000008e |
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#define NATV_BUS_MEM_READ_BRL_IO 0x4000008f |
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#define NATV_BUS_MEM_READ_BRL_SELF 0x40000090 |
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#define NATV_BUS_MEM_READ_OUT_HI 0x40000091 |
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#define NATV_BUS_MEM_READ_OUT_LO 0x40000092 |
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#define NATV_BUS_OOQ_LIVE_REQ_HI 0x40000093 |
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#define NATV_BUS_OOQ_LIVE_REQ_LO 0x40000094 |
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#define NATV_BUS_RD_DATA_ANY 0x40000095 |
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#define NATV_BUS_RD_DATA_IO 0x40000096 |
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#define NATV_BUS_RD_DATA_SELF 0x40000097 |
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#define NATV_BUS_RD_HIT 0x40000098 |
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#define NATV_BUS_RD_HITM 0x40000099 |
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#define NATV_BUS_RD_INVAL_ALL_HITM 0x4000009a |
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#define NATV_BUS_RD_INVAL_HITM 0x4000009b |
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#define NATV_BUS_RD_IO_ANY 0x4000009c |
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#define NATV_BUS_RD_IO_IO 0x4000009d |
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#define NATV_BUS_RD_IO_SELF 0x4000009e |
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#define NATV_BUS_RD_PRTL_ANY 0x4000009f |
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#define NATV_BUS_RD_PRTL_IO 0x400000a0 |
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#define NATV_BUS_RD_PRTL_SELF 0x400000a1 |
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#define NATV_BUS_SNOOPQ_REQ 0x400000a2 |
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#define NATV_BUS_SNOOPS_ANY 0x400000a3 |
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#define NATV_BUS_SNOOPS_IO 0x400000a4 |
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#define NATV_BUS_SNOOPS_SELF 0x400000a5 |
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#define NATV_BUS_SNOOPS_HITM_ANY 0x400000a6 |
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#define NATV_BUS_SNOOPS_HITM_SELF 0x400000a7 |
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#define NATV_BUS_SNOOP_STALL_CYCLES_ANY 0x400000a8 |
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#define NATV_BUS_SNOOP_STALL_CYCLES_SELF 0x400000a9 |
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#define NATV_BUS_WR_WB_ALL_ANY 0x400000aa |
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#define NATV_BUS_WR_WB_ALL_IO 0x400000ab |
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#define NATV_BUS_WR_WB_ALL_SELF 0x400000ac |
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#define NATV_BUS_WR_WB_CCASTOUT_ANY 0x400000ad |
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#define NATV_BUS_WR_WB_CCASTOUT_SELF 0x400000ae |
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#define NATV_BUS_WR_WB_EQ_128BYTE_ANY 0x400000af |
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#define NATV_BUS_WR_WB_EQ_128BYTE_IO 0x400000b0 |
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#define NATV_BUS_WR_WB_EQ_128BYTE_SELF 0x400000b1 |
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#define NATV_CPU_CPL_CHANGES 0x400000b2 |
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#define NATV_CPU_CYCLES 0x400000b3 |
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#define NATV_DATA_DEBUG_REGISTER_FAULT 0x400000b4 |
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#define NATV_DATA_DEBUG_REGISTER_MATCHES 0x400000b5 |
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#define NATV_DATA_EAR_ALAT 0x400000b6 |
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#define NATV_DATA_EAR_CACHE_LAT1024 0x400000b7 |
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#define NATV_DATA_EAR_CACHE_LAT128 0x400000b8 |
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#define NATV_DATA_EAR_CACHE_LAT16 0x400000b9 |
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#define NATV_DATA_EAR_CACHE_LAT2048 0x400000ba |
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#define NATV_DATA_EAR_CACHE_LAT256 0x400000bb |
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#define NATV_DATA_EAR_CACHE_LAT32 0x400000bc |
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#define NATV_DATA_EAR_CACHE_LAT4 0x400000bd |
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#define NATV_DATA_EAR_CACHE_LAT4096 0x400000be |
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#define NATV_DATA_EAR_CACHE_LAT512 0x400000bf |
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#define NATV_DATA_EAR_CACHE_LAT64 0x400000c0 |
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#define NATV_DATA_EAR_CACHE_LAT8 0x400000c1 |
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#define NATV_DATA_EAR_EVENTS 0x400000c2 |
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#define NATV_DATA_EAR_TLB_ALL 0x400000c3 |
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#define NATV_DATA_EAR_TLB_FAULT 0x400000c4 |
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#define NATV_DATA_EAR_TLB_L2DTLB 0x400000c5 |
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#define NATV_DATA_EAR_TLB_L2DTLB_OR_FAULT 0x400000c6 |
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#define NATV_DATA_EAR_TLB_L2DTLB_OR_VHPT 0x400000c7 |
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#define NATV_DATA_EAR_TLB_VHPT 0x400000c8 |
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#define NATV_DATA_EAR_TLB_VHPT_OR_FAULT 0x400000c9 |
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#define NATV_DATA_REFERENCES_SET0 0x400000ca |
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#define NATV_DATA_REFERENCES_SET1 0x400000cb |
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#define NATV_DISP_STALLED 0x400000cc |
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#define NATV_DTLB_INSERTS_HPW 0x400000cd |
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#define NATV_DTLB_INSERTS_HPW_RETIRED 0x400000ce |
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#define NATV_ENCBR_MISPRED_DETAIL_ALL_ALL_PRED 0x400000cf |
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#define NATV_ENCBR_MISPRED_DETAIL_ALL_CORRECT_PRED 0x400000d0 |
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#define NATV_ENCBR_MISPRED_DETAIL_ALL_WRONG_PATH 0x400000d1 |
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#define NATV_ENCBR_MISPRED_DETAIL_ALL_WRONG_TARGET 0x400000d2 |
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#define NATV_ENCBR_MISPRED_DETAIL_ALL2_ALL_PRED 0x400000d3 |
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#define NATV_ENCBR_MISPRED_DETAIL_ALL2_CORRECT_PRED 0x400000d4 |
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#define NATV_ENCBR_MISPRED_DETAIL_ALL2_WRONG_PATH 0x400000d5 |
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#define NATV_ENCBR_MISPRED_DETAIL_ALL2_WRONG_TARGET 0x400000d6 |
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#define NATV_ENCBR_MISPRED_DETAIL_OVERSUB_ALL_PRED 0x400000d7 |
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#define NATV_ENCBR_MISPRED_DETAIL_OVERSUB_CORRECT_PRED 0x400000d8 |
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#define NATV_ENCBR_MISPRED_DETAIL_OVERSUB_WRONG_PATH 0x400000d9 |
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#define NATV_ENCBR_MISPRED_DETAIL_OVERSUB_WRONG_TARGET 0x400000da |
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#define NATV_EXTERN_DP_PINS_0_TO_3_ALL 0x400000db |
231 |
|
|
#define NATV_EXTERN_DP_PINS_0_TO_3_PIN0 0x400000dc |
232 |
|
|
#define NATV_EXTERN_DP_PINS_0_TO_3_PIN0_OR_PIN1 0x400000dd |
233 |
|
|
#define NATV_EXTERN_DP_PINS_0_TO_3_PIN0_OR_PIN1_OR_PIN2 0x400000de |
234 |
|
|
#define NATV_EXTERN_DP_PINS_0_TO_3_PIN0_OR_PIN1_OR_PIN3 0x400000df |
235 |
|
|
#define NATV_EXTERN_DP_PINS_0_TO_3_PIN0_OR_PIN2 0x400000e0 |
236 |
|
|
#define NATV_EXTERN_DP_PINS_0_TO_3_PIN0_OR_PIN2_OR_PIN3 0x400000e1 |
237 |
|
|
#define NATV_EXTERN_DP_PINS_0_TO_3_PIN0_OR_PIN3 0x400000e2 |
238 |
|
|
#define NATV_EXTERN_DP_PINS_0_TO_3_PIN1 0x400000e3 |
239 |
|
|
#define NATV_EXTERN_DP_PINS_0_TO_3_PIN1_OR_PIN2 0x400000e4 |
240 |
|
|
#define NATV_EXTERN_DP_PINS_0_TO_3_PIN1_OR_PIN2_OR_PIN3 0x400000e5 |
241 |
|
|
#define NATV_EXTERN_DP_PINS_0_TO_3_PIN1_OR_PIN3 0x400000e6 |
242 |
|
|
#define NATV_EXTERN_DP_PINS_0_TO_3_PIN2 0x400000e7 |
243 |
|
|
#define NATV_EXTERN_DP_PINS_0_TO_3_PIN2_OR_PIN3 0x400000e8 |
244 |
|
|
#define NATV_EXTERN_DP_PINS_0_TO_3_PIN3 0x400000e9 |
245 |
|
|
#define NATV_EXTERN_DP_PINS_4_TO_5_ALL 0x400000ea |
246 |
|
|
#define NATV_EXTERN_DP_PINS_4_TO_5_PIN4 0x400000eb |
247 |
|
|
#define NATV_EXTERN_DP_PINS_4_TO_5_PIN5 0x400000ec |
248 |
|
|
#define NATV_FE_BUBBLE_ALL 0x400000ed |
249 |
|
|
#define NATV_FE_BUBBLE_ALLBUT_FEFLUSH_BUBBLE 0x400000ee |
250 |
|
|
#define NATV_FE_BUBBLE_ALLBUT_IBFULL 0x400000ef |
251 |
|
|
#define NATV_FE_BUBBLE_BRANCH 0x400000f0 |
252 |
|
|
#define NATV_FE_BUBBLE_BUBBLE 0x400000f1 |
253 |
|
|
#define NATV_FE_BUBBLE_FEFLUSH 0x400000f2 |
254 |
|
|
#define NATV_FE_BUBBLE_FILL_RECIRC 0x400000f3 |
255 |
|
|
#define NATV_FE_BUBBLE_GROUP1 0x400000f4 |
256 |
|
|
#define NATV_FE_BUBBLE_GROUP2 0x400000f5 |
257 |
|
|
#define NATV_FE_BUBBLE_GROUP3 0x400000f6 |
258 |
|
|
#define NATV_FE_BUBBLE_IBFULL 0x400000f7 |
259 |
|
|
#define NATV_FE_BUBBLE_IMISS 0x400000f8 |
260 |
|
|
#define NATV_FE_BUBBLE_TLBMISS 0x400000f9 |
261 |
|
|
#define NATV_FE_LOST_BW_ALL 0x400000fa |
262 |
|
|
#define NATV_FE_LOST_BW_BI 0x400000fb |
263 |
|
|
#define NATV_FE_LOST_BW_BRQ 0x400000fc |
264 |
|
|
#define NATV_FE_LOST_BW_BR_ILOCK 0x400000fd |
265 |
|
|
#define NATV_FE_LOST_BW_BUBBLE 0x400000fe |
266 |
|
|
#define NATV_FE_LOST_BW_FEFLUSH 0x400000ff |
267 |
|
|
#define NATV_FE_LOST_BW_FILL_RECIRC 0x40000100 |
268 |
|
|
#define NATV_FE_LOST_BW_IBFULL 0x40000101 |
269 |
|
|
#define NATV_FE_LOST_BW_IMISS 0x40000102 |
270 |
|
|
#define NATV_FE_LOST_BW_PLP 0x40000103 |
271 |
|
|
#define NATV_FE_LOST_BW_TLBMISS 0x40000104 |
272 |
|
|
#define NATV_FE_LOST_BW_UNREACHED 0x40000105 |
273 |
|
|
#define NATV_FP_FAILED_FCHKF 0x40000106 |
274 |
|
|
#define NATV_FP_FALSE_SIRSTALL 0x40000107 |
275 |
|
|
#define NATV_FP_FLUSH_TO_ZERO 0x40000108 |
276 |
|
|
#define NATV_FP_OPS_RETIRED 0x40000109 |
277 |
|
|
#define NATV_FP_TRUE_SIRSTALL 0x4000010a |
278 |
|
|
#define NATV_HPW_DATA_REFERENCES 0x4000010b |
279 |
|
|
#define NATV_IA32_INST_RETIRED 0x4000010c |
280 |
|
|
#define NATV_IA32_ISA_TRANSITIONS 0x4000010d |
281 |
|
|
#define NATV_IA64_INST_RETIRED 0x4000010e |
282 |
|
|
#define NATV_IA64_INST_RETIRED_THIS 0x4000010f |
283 |
|
|
#define NATV_IA64_TAGGED_INST_RETIRED_IBRP0_PMC8 0x40000110 |
284 |
|
|
#define NATV_IA64_TAGGED_INST_RETIRED_IBRP1_PMC9 0x40000111 |
285 |
|
|
#define NATV_IA64_TAGGED_INST_RETIRED_IBRP2_PMC8 0x40000112 |
286 |
|
|
#define NATV_IA64_TAGGED_INST_RETIRED_IBRP3_PMC9 0x40000113 |
287 |
|
|
#define NATV_IDEAL_BE_LOST_BW_DUE_TO_FE_ALL 0x40000114 |
288 |
|
|
#define NATV_IDEAL_BE_LOST_BW_DUE_TO_FE_BI 0x40000115 |
289 |
|
|
#define NATV_IDEAL_BE_LOST_BW_DUE_TO_FE_BRQ 0x40000116 |
290 |
|
|
#define NATV_IDEAL_BE_LOST_BW_DUE_TO_FE_BR_ILOCK 0x40000117 |
291 |
|
|
#define NATV_IDEAL_BE_LOST_BW_DUE_TO_FE_BUBBLE 0x40000118 |
292 |
|
|
#define NATV_IDEAL_BE_LOST_BW_DUE_TO_FE_FEFLUSH 0x40000119 |
293 |
|
|
#define NATV_IDEAL_BE_LOST_BW_DUE_TO_FE_FILL_RECIRC 0x4000011a |
294 |
|
|
#define NATV_IDEAL_BE_LOST_BW_DUE_TO_FE_IBFULL 0x4000011b |
295 |
|
|
#define NATV_IDEAL_BE_LOST_BW_DUE_TO_FE_IMISS 0x4000011c |
296 |
|
|
#define NATV_IDEAL_BE_LOST_BW_DUE_TO_FE_PLP 0x4000011d |
297 |
|
|
#define NATV_IDEAL_BE_LOST_BW_DUE_TO_FE_TLBMISS 0x4000011e |
298 |
|
|
#define NATV_IDEAL_BE_LOST_BW_DUE_TO_FE_UNREACHED 0x4000011f |
299 |
|
|
#define NATV_INST_CHKA_LDC_ALAT_ALL 0x40000120 |
300 |
|
|
#define NATV_INST_CHKA_LDC_ALAT_FP 0x40000121 |
301 |
|
|
#define NATV_INST_CHKA_LDC_ALAT_INT 0x40000122 |
302 |
|
|
#define NATV_INST_DISPERSED 0x40000123 |
303 |
|
|
#define NATV_INST_FAILED_CHKA_LDC_ALAT_ALL 0x40000124 |
304 |
|
|
#define NATV_INST_FAILED_CHKA_LDC_ALAT_FP 0x40000125 |
305 |
|
|
#define NATV_INST_FAILED_CHKA_LDC_ALAT_INT 0x40000126 |
306 |
|
|
#define NATV_INST_FAILED_CHKS_RETIRED_ALL 0x40000127 |
307 |
|
|
#define NATV_INST_FAILED_CHKS_RETIRED_FP 0x40000128 |
308 |
|
|
#define NATV_INST_FAILED_CHKS_RETIRED_INT 0x40000129 |
309 |
|
|
#define NATV_ISB_BUNPAIRS_IN 0x4000012a |
310 |
|
|
#define NATV_ITLB_MISSES_FETCH_ALL 0x4000012b |
311 |
|
|
#define NATV_ITLB_MISSES_FETCH_L1ITLB 0x4000012c |
312 |
|
|
#define NATV_ITLB_MISSES_FETCH_L2ITLB 0x4000012d |
313 |
|
|
#define NATV_L1DTLB_TRANSFER 0x4000012e |
314 |
|
|
#define NATV_L1D_READS_SET0 0x4000012f |
315 |
|
|
#define NATV_L1D_READS_SET1 0x40000130 |
316 |
|
|
#define NATV_L1D_READ_MISSES_ALL 0x40000131 |
317 |
|
|
#define NATV_L1D_READ_MISSES_RSE_FILL 0x40000132 |
318 |
|
|
#define NATV_L1ITLB_INSERTS_HPW 0x40000133 |
319 |
|
|
#define NATV_L1I_EAR_CACHE_LAT0 0x40000134 |
320 |
|
|
#define NATV_L1I_EAR_CACHE_LAT1024 0x40000135 |
321 |
|
|
#define NATV_L1I_EAR_CACHE_LAT128 0x40000136 |
322 |
|
|
#define NATV_L1I_EAR_CACHE_LAT16 0x40000137 |
323 |
|
|
#define NATV_L1I_EAR_CACHE_LAT256 0x40000138 |
324 |
|
|
#define NATV_L1I_EAR_CACHE_LAT32 0x40000139 |
325 |
|
|
#define NATV_L1I_EAR_CACHE_LAT4 0x4000013a |
326 |
|
|
#define NATV_L1I_EAR_CACHE_LAT4096 0x4000013b |
327 |
|
|
#define NATV_L1I_EAR_CACHE_LAT8 0x4000013c |
328 |
|
|
#define NATV_L1I_EAR_CACHE_RAB 0x4000013d |
329 |
|
|
#define NATV_L1I_EAR_EVENTS 0x4000013e |
330 |
|
|
#define NATV_L1I_EAR_TLB_ALL 0x4000013f |
331 |
|
|
#define NATV_L1I_EAR_TLB_FAULT 0x40000140 |
332 |
|
|
#define NATV_L1I_EAR_TLB_L2TLB 0x40000141 |
333 |
|
|
#define NATV_L1I_EAR_TLB_L2TLB_OR_FAULT 0x40000142 |
334 |
|
|
#define NATV_L1I_EAR_TLB_L2TLB_OR_VHPT 0x40000143 |
335 |
|
|
#define NATV_L1I_EAR_TLB_VHPT 0x40000144 |
336 |
|
|
#define NATV_L1I_EAR_TLB_VHPT_OR_FAULT 0x40000145 |
337 |
|
|
#define NATV_L1I_FETCH_ISB_HIT 0x40000146 |
338 |
|
|
#define NATV_L1I_FETCH_RAB_HIT 0x40000147 |
339 |
|
|
#define NATV_L1I_FILLS 0x40000148 |
340 |
|
|
#define NATV_L1I_PREFETCHES 0x40000149 |
341 |
|
|
#define NATV_L1I_PREFETCH_STALL_ALL 0x4000014a |
342 |
|
|
#define NATV_L1I_PREFETCH_STALL_FLOW 0x4000014b |
343 |
|
|
#define NATV_L1I_PURGE 0x4000014c |
344 |
|
|
#define NATV_L1I_PVAB_OVERFLOW 0x4000014d |
345 |
|
|
#define NATV_L1I_RAB_ALMOST_FULL 0x4000014e |
346 |
|
|
#define NATV_L1I_RAB_FULL 0x4000014f |
347 |
|
|
#define NATV_L1I_READS 0x40000150 |
348 |
|
|
#define NATV_L1I_SNOOP 0x40000151 |
349 |
|
|
#define NATV_L1I_STRM_PREFETCHES 0x40000152 |
350 |
|
|
#define NATV_L2DTLB_MISSES 0x40000153 |
351 |
|
|
#define NATV_L2_BAD_LINES_SELECTED_ANY 0x40000154 |
352 |
|
|
#define NATV_L2_BYPASS_L2_DATA1 0x40000155 |
353 |
|
|
#define NATV_L2_BYPASS_L2_DATA2 0x40000156 |
354 |
|
|
#define NATV_L2_BYPASS_L2_INST1 0x40000157 |
355 |
|
|
#define NATV_L2_BYPASS_L2_INST2 0x40000158 |
356 |
|
|
#define NATV_L2_BYPASS_L3_DATA1 0x40000159 |
357 |
|
|
#define NATV_L2_BYPASS_L3_INST1 0x4000015a |
358 |
|
|
#define NATV_L2_DATA_REFERENCES_L2_ALL 0x4000015b |
359 |
|
|
#define NATV_L2_DATA_REFERENCES_L2_DATA_READS 0x4000015c |
360 |
|
|
#define NATV_L2_DATA_REFERENCES_L2_DATA_WRITES 0x4000015d |
361 |
|
|
#define NATV_L2_FILLB_FULL_THIS 0x4000015e |
362 |
|
|
#define NATV_L2_FORCE_RECIRC_ANY 0x4000015f |
363 |
|
|
#define NATV_L2_FORCE_RECIRC_FILL_HIT 0x40000160 |
364 |
|
|
#define NATV_L2_FORCE_RECIRC_FRC_RECIRC 0x40000161 |
365 |
|
|
#define NATV_L2_FORCE_RECIRC_IPF_MISS 0x40000162 |
366 |
|
|
#define NATV_L2_FORCE_RECIRC_L1W 0x40000163 |
367 |
|
|
#define NATV_L2_FORCE_RECIRC_OZQ_MISS 0x40000164 |
368 |
|
|
#define NATV_L2_FORCE_RECIRC_SAME_INDEX 0x40000165 |
369 |
|
|
#define NATV_L2_FORCE_RECIRC_SMC_HIT 0x40000166 |
370 |
|
|
#define NATV_L2_FORCE_RECIRC_SNP_OR_L3 0x40000167 |
371 |
|
|
#define NATV_L2_FORCE_RECIRC_TAG_NOTOK 0x40000168 |
372 |
|
|
#define NATV_L2_FORCE_RECIRC_TRAN_PREF 0x40000169 |
373 |
|
|
#define NATV_L2_FORCE_RECIRC_VIC_BUF_FULL 0x4000016a |
374 |
|
|
#define NATV_L2_FORCE_RECIRC_VIC_PEND 0x4000016b |
375 |
|
|
#define NATV_L2_GOT_RECIRC_IFETCH_ANY 0x4000016c |
376 |
|
|
#define NATV_L2_GOT_RECIRC_OZQ_ACC 0x4000016d |
377 |
|
|
#define NATV_L2_IFET_CANCELS_ANY 0x4000016e |
378 |
|
|
#define NATV_L2_IFET_CANCELS_BYPASS 0x4000016f |
379 |
|
|
#define NATV_L2_IFET_CANCELS_CHG_PRIO 0x40000170 |
380 |
|
|
#define NATV_L2_IFET_CANCELS_DATA_RD 0x40000171 |
381 |
|
|
#define NATV_L2_IFET_CANCELS_DIDNT_RECIR 0x40000172 |
382 |
|
|
#define NATV_L2_IFET_CANCELS_IFETCH_BYP 0x40000173 |
383 |
|
|
#define NATV_L2_IFET_CANCELS_PREEMPT 0x40000174 |
384 |
|
|
#define NATV_L2_IFET_CANCELS_RECIR_OVER_SUB 0x40000175 |
385 |
|
|
#define NATV_L2_IFET_CANCELS_ST_FILL_WB 0x40000176 |
386 |
|
|
#define NATV_L2_INST_DEMAND_READS 0x40000177 |
387 |
|
|
#define NATV_L2_INST_PREFETCHES 0x40000178 |
388 |
|
|
#define NATV_L2_ISSUED_RECIRC_IFETCH_ANY 0x40000179 |
389 |
|
|
#define NATV_L2_ISSUED_RECIRC_OZQ_ACC 0x4000017a |
390 |
|
|
#define NATV_L2_L3ACCESS_CANCEL_ANY 0x4000017b |
391 |
|
|
#define NATV_L2_L3ACCESS_CANCEL_DFETCH 0x4000017c |
392 |
|
|
#define NATV_L2_L3ACCESS_CANCEL_EBL_REJECT 0x4000017d |
393 |
|
|
#define NATV_L2_L3ACCESS_CANCEL_FILLD_FULL 0x4000017e |
394 |
|
|
#define NATV_L2_L3ACCESS_CANCEL_IFETCH 0x4000017f |
395 |
|
|
#define NATV_L2_L3ACCESS_CANCEL_INV_L3_BYP 0x40000180 |
396 |
|
|
#define NATV_L2_L3ACCESS_CANCEL_SPEC_L3_BYP 0x40000181 |
397 |
|
|
#define NATV_L2_L3ACCESS_CANCEL_UC_BLOCKED 0x40000182 |
398 |
|
|
#define NATV_L2_MISSES 0x40000183 |
399 |
|
|
#define NATV_L2_OPS_ISSUED_FP_LOAD 0x40000184 |
400 |
|
|
#define NATV_L2_OPS_ISSUED_INT_LOAD 0x40000185 |
401 |
|
|
#define NATV_L2_OPS_ISSUED_NST_NLD 0x40000186 |
402 |
|
|
#define NATV_L2_OPS_ISSUED_RMW 0x40000187 |
403 |
|
|
#define NATV_L2_OPS_ISSUED_STORE 0x40000188 |
404 |
|
|
#define NATV_L2_OZDB_FULL_THIS 0x40000189 |
405 |
|
|
#define NATV_L2_OZQ_ACQUIRE 0x4000018a |
406 |
|
|
#define NATV_L2_OZQ_CANCELS0_ANY 0x4000018b |
407 |
|
|
#define NATV_L2_OZQ_CANCELS0_LATE_ACQUIRE 0x4000018c |
408 |
|
|
#define NATV_L2_OZQ_CANCELS0_LATE_BYP_EFFRELEASE 0x4000018d |
409 |
|
|
#define NATV_L2_OZQ_CANCELS0_LATE_RELEASE 0x4000018e |
410 |
|
|
#define NATV_L2_OZQ_CANCELS0_LATE_SPEC_BYP 0x4000018f |
411 |
|
|
#define NATV_L2_OZQ_CANCELS1_BANK_CONF 0x40000190 |
412 |
|
|
#define NATV_L2_OZQ_CANCELS1_CANC_L2M_ST 0x40000191 |
413 |
|
|
#define NATV_L2_OZQ_CANCELS1_CCV 0x40000192 |
414 |
|
|
#define NATV_L2_OZQ_CANCELS1_ECC 0x40000193 |
415 |
|
|
#define NATV_L2_OZQ_CANCELS1_HPW_IFETCH_CONF 0x40000194 |
416 |
|
|
#define NATV_L2_OZQ_CANCELS1_L1DF_L2M 0x40000195 |
417 |
|
|
#define NATV_L2_OZQ_CANCELS1_L1_FILL_CONF 0x40000196 |
418 |
|
|
#define NATV_L2_OZQ_CANCELS1_L2A_ST_MAT 0x40000197 |
419 |
|
|
#define NATV_L2_OZQ_CANCELS1_L2D_ST_MAT 0x40000198 |
420 |
|
|
#define NATV_L2_OZQ_CANCELS1_L2M_ST_MAT 0x40000199 |
421 |
|
|
#define NATV_L2_OZQ_CANCELS1_MFA 0x4000019a |
422 |
|
|
#define NATV_L2_OZQ_CANCELS1_REL 0x4000019b |
423 |
|
|
#define NATV_L2_OZQ_CANCELS1_SEM 0x4000019c |
424 |
|
|
#define NATV_L2_OZQ_CANCELS1_ST_FILL_CONF 0x4000019d |
425 |
|
|
#define NATV_L2_OZQ_CANCELS1_SYNC 0x4000019e |
426 |
|
|
#define NATV_L2_OZQ_CANCELS2_ACQ 0x4000019f |
427 |
|
|
#define NATV_L2_OZQ_CANCELS2_CANC_L2C_ST 0x400001a0 |
428 |
|
|
#define NATV_L2_OZQ_CANCELS2_CANC_L2D_ST 0x400001a1 |
429 |
|
|
#define NATV_L2_OZQ_CANCELS2_DIDNT_RECIRC 0x400001a2 |
430 |
|
|
#define NATV_L2_OZQ_CANCELS2_D_IFET 0x400001a3 |
431 |
|
|
#define NATV_L2_OZQ_CANCELS2_L2C_ST_MAT 0x400001a4 |
432 |
|
|
#define NATV_L2_OZQ_CANCELS2_L2FILL_ST_CONF 0x400001a5 |
433 |
|
|
#define NATV_L2_OZQ_CANCELS2_OVER_SUB 0x400001a6 |
434 |
|
|
#define NATV_L2_OZQ_CANCELS2_OZ_DATA_CONF 0x400001a7 |
435 |
|
|
#define NATV_L2_OZQ_CANCELS2_READ_WB_CONF 0x400001a8 |
436 |
|
|
#define NATV_L2_OZQ_CANCELS2_RECIRC_OVER_SUB 0x400001a9 |
437 |
|
|
#define NATV_L2_OZQ_CANCELS2_SCRUB 0x400001aa |
438 |
|
|
#define NATV_L2_OZQ_CANCELS2_WEIRD 0x400001ab |
439 |
|
|
#define NATV_L2_OZQ_FULL_THIS 0x400001ac |
440 |
|
|
#define NATV_L2_OZQ_RELEASE 0x400001ad |
441 |
|
|
#define NATV_L2_REFERENCES 0x400001ae |
442 |
|
|
#define NATV_L2_STORE_HIT_SHARED_ANY 0x400001af |
443 |
|
|
#define NATV_L2_SYNTH_PROBE 0x400001b0 |
444 |
|
|
#define NATV_L2_VICTIMB_FULL_THIS 0x400001b1 |
445 |
|
|
#define NATV_L3_LINES_REPLACED 0x400001b2 |
446 |
|
|
#define NATV_L3_MISSES 0x400001b3 |
447 |
|
|
#define NATV_L3_READS_ALL_ALL 0x400001b4 |
448 |
|
|
#define NATV_L3_READS_ALL_HIT 0x400001b5 |
449 |
|
|
#define NATV_L3_READS_ALL_MISS 0x400001b6 |
450 |
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#define NATV_L3_READS_DATA_READ_ALL 0x400001b7 |
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#define NATV_L3_READS_DATA_READ_HIT 0x400001b8 |
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#define NATV_L3_READS_DATA_READ_MISS 0x400001b9 |
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#define NATV_L3_READS_DINST_FETCH_ALL 0x400001ba |
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#define NATV_L3_READS_DINST_FETCH_HIT 0x400001bb |
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#define NATV_L3_READS_DINST_FETCH_MISS 0x400001bc |
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#define NATV_L3_READS_INST_FETCH_ALL 0x400001bd |
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#define NATV_L3_READS_INST_FETCH_HIT 0x400001be |
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#define NATV_L3_READS_INST_FETCH_MISS 0x400001bf |
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#define NATV_L3_REFERENCES 0x400001c0 |
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#define NATV_L3_WRITES_ALL_ALL 0x400001c1 |
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#define NATV_L3_WRITES_ALL_HIT 0x400001c2 |
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#define NATV_L3_WRITES_ALL_MISS 0x400001c3 |
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#define NATV_L3_WRITES_DATA_WRITE_ALL 0x400001c4 |
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#define NATV_L3_WRITES_DATA_WRITE_HIT 0x400001c5 |
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#define NATV_L3_WRITES_DATA_WRITE_MISS 0x400001c6 |
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#define NATV_L3_WRITES_L2_WB_ALL 0x400001c7 |
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#define NATV_L3_WRITES_L2_WB_HIT 0x400001c8 |
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#define NATV_L3_WRITES_L2_WB_MISS 0x400001c9 |
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#define NATV_LOADS_RETIRED 0x400001ca |
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#define NATV_MEM_READ_CURRENT_ANY 0x400001cb |
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#define NATV_MEM_READ_CURRENT_IO 0x400001cc |
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#define NATV_MISALIGNED_LOADS_RETIRED 0x400001cd |
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#define NATV_MISALIGNED_STORES_RETIRED 0x400001ce |
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#define NATV_NOPS_RETIRED 0x400001cf |
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#define NATV_PREDICATE_SQUASHED_RETIRED 0x400001d0 |
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#define NATV_RSE_CURRENT_REGS_2_TO_0 0x400001d1 |
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#define NATV_RSE_CURRENT_REGS_5_TO_3 0x400001d2 |
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#define NATV_RSE_CURRENT_REGS_6 0x400001d3 |
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#define NATV_RSE_DIRTY_REGS_2_TO_0 0x400001d4 |
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#define NATV_RSE_DIRTY_REGS_5_TO_3 0x400001d5 |
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#define NATV_RSE_DIRTY_REGS_6 0x400001d6 |
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#define NATV_RSE_EVENT_RETIRED 0x400001d7 |
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#define NATV_RSE_REFERENCES_RETIRED_ALL 0x400001d8 |
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#define NATV_RSE_REFERENCES_RETIRED_LOAD 0x400001d9 |
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#define NATV_RSE_REFERENCES_RETIRED_STORE 0x400001da |
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#define NATV_SERIALIZATION_EVENTS 0x400001db |
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#define NATV_STORES_RETIRED 0x400001dc |
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#define NATV_SYLL_NOT_DISPERSED_ALL 0x400001dd |
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#define NATV_SYLL_NOT_DISPERSED_EXPL 0x400001de |
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#define NATV_SYLL_NOT_DISPERSED_EXPL_OR_FE 0x400001df |
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#define NATV_SYLL_NOT_DISPERSED_EXPL_OR_FE_OR_MLI 0x400001e0 |
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#define NATV_SYLL_NOT_DISPERSED_EXPL_OR_IMPL 0x400001e1 |
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#define NATV_SYLL_NOT_DISPERSED_EXPL_OR_IMPL_OR_FE 0x400001e2 |
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#define NATV_SYLL_NOT_DISPERSED_EXPL_OR_IMPL_OR_MLI 0x400001e3 |
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#define NATV_SYLL_NOT_DISPERSED_EXPL_OR_MLI 0x400001e4 |
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#define NATV_SYLL_NOT_DISPERSED_FE 0x400001e5 |
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#define NATV_SYLL_NOT_DISPERSED_FE_OR_MLI 0x400001e6 |
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#define NATV_SYLL_NOT_DISPERSED_IMPL 0x400001e7 |
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#define NATV_SYLL_NOT_DISPERSED_IMPL_OR_FE 0x400001e8 |
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#define NATV_SYLL_NOT_DISPERSED_IMPL_OR_FE_OR_MLI 0x400001e9 |
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#define NATV_SYLL_NOT_DISPERSED_IMPL_OR_MLI 0x400001ea |
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#define NATV_SYLL_NOT_DISPERSED_MLI 0x400001eb |
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#define NATV_SYLL_OVERCOUNT_ALL 0x400001ec |
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#define NATV_SYLL_OVERCOUNT_EXPL 0x400001ed |
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#define NATV_SYLL_OVERCOUNT_IMPL 0x400001ee |
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#define NATV_UC_LOADS_RETIRED 0x400001ef |
507 |
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#define NATV_UC_STORES_RETIRED 0x400001f0 |