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/* $Id: SparseMatrix_MatrixVector.c 1306 2007-09-18 05:51:09Z ksteube $ */ |
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/******************************************************* |
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* |
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* Copyright 2003-2007 by ACceSS MNRF |
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* Copyright 2007 by University of Queensland |
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* |
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* http://esscc.uq.edu.au |
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* Primary Business: Queensland, Australia |
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* Licensed under the Open Software License version 3.0 |
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* http://www.opensource.org/licenses/osl-3.0.php |
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* |
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*******************************************************/ |
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/**************************************************************/ |
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/* Paso: raw scaled vector update operation: out = alpha * A * in + beta * out */ |
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/**************************************************************/ |
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/* Author: gross@access.edu.au */ |
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/**************************************************************/ |
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#include "SparseMatrix.h" |
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/* CSC format with offset 0*/ |
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void Paso_SparseMatrix_MatrixVector_CSC_OFFSET0(double alpha, |
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Paso_SparseMatrix* A, |
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double* in, |
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double beta, |
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double* out) { |
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register index_t ir,icol,iptr,icb,irb,irow,ic; |
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register double reg,reg1,reg2,reg3; |
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#pragma omp barrier |
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if (ABS(beta)>0.) { |
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if (beta != 1.) { |
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#pragma omp for private(irow) schedule(static) |
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for (irow=0;irow < A->numRows * A->row_block_size;irow++) |
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out[irow] *= beta; |
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} |
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} else { |
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#pragma omp for private(irow) schedule(static) |
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for (irow=0;irow < A->numRows * A->row_block_size;irow++) |
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out[irow] = 0; |
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} |
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if (Paso_Pattern_isEmpty(A->pattern)) return; |
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/* do the operation: */ |
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if (ABS(alpha)>0) { |
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if (A ->col_block_size==1 && A->row_block_size ==1) { |
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/* TODO: parallelize (good luck!) */ |
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#pragma omp single |
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for (icol=0;icol< A->pattern->numOutput;++icol) { |
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#pragma ivdep |
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for (iptr=A->pattern->ptr[icol];iptr<A->pattern->ptr[icol+1]; ++iptr) { |
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out[A->pattern->index[iptr]]+= alpha * A->val[iptr] * in[icol]; |
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} |
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} |
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} else if (A ->col_block_size==2 && A->row_block_size ==2) { |
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/* TODO: parallelize */ |
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#pragma omp single |
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for (ic=0;ic< A->pattern->numOutput;ic++) { |
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#pragma ivdep |
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for (iptr=A->pattern->ptr[ic];iptr<A->pattern->ptr[ic+1]; iptr++) { |
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ir=2*(A->pattern->index[iptr]); |
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out[ ir] += alpha * ( A->val[iptr*4 ]*in[ic] + A->val[iptr*4+2]*in[1+ic] ); |
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out[1+ir] += alpha * ( A->val[iptr*4+1]*in[ic] + A->val[iptr*4+3]*in[1+ic] ); |
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ksteube |
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} |
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} |
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} else if (A ->col_block_size==3 && A->row_block_size ==3) { |
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/* TODO: parallelize */ |
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#pragma omp single |
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for (ic=0;ic< A->pattern->numOutput;ic++) { |
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#pragma ivdep |
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for (iptr=A->pattern->ptr[ic];iptr<A->pattern->ptr[ic+1]; iptr++) { |
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ir=3*(A->pattern->index[iptr]); |
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out[ ir] += alpha * ( A->val[iptr*9 ]*in[ic] + A->val[iptr*9+3]*in[1+ic] + A->val[iptr*9+6]*in[2+ic] ); |
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out[1+ir] += alpha * ( A->val[iptr*9+1]*in[ic] + A->val[iptr*9+4]*in[1+ic] + A->val[iptr*9+7]*in[2+ic] ); |
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out[2+ir] += alpha * ( A->val[iptr*9+2]*in[ic] + A->val[iptr*9+5]*in[1+ic] + A->val[iptr*9+8]*in[2+ic] ); |
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} |
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} |
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} else { |
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/* TODO: parallelize */ |
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#pragma omp single |
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for (ic=0;ic< A->pattern->numOutput;ic++) { |
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for (iptr=A->pattern->ptr[ic];iptr<A->pattern->ptr[ic+1]; iptr++) { |
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for (irb=0;irb< A->row_block_size;irb++) { |
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irow=irb+A->row_block_size*(A->pattern->index[iptr]); |
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#pragma ivdep |
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for (icb=0;icb< A->col_block_size;icb++) { |
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icol=icb+A->col_block_size*ic; |
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out[irow] += alpha * A->val[iptr*A->block_size+irb+A->row_block_size*icb] * in[icol]; |
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} |
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} |
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} |
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} |
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} |
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} |
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return; |
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} |
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/* CSC format with offset 1*/ |
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void Paso_SparseMatrix_MatrixVector_CSC_OFFSET1(double alpha, |
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Paso_SparseMatrix* A, |
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double* in, |
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double beta, |
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double* out) { |
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register index_t ir,icol,iptr,icb,irb,irow,ic; |
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register double reg,reg1,reg2,reg3; |
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#pragma omp barrier |
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if (ABS(beta)>0.) { |
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if (beta != 1.) { |
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#pragma omp for private(irow) schedule(static) |
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for (irow=0;irow < A->numRows * A->row_block_size;irow++) { |
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out[irow] *= beta; |
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} |
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} |
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} else { |
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#pragma omp for private(irow) schedule(static) |
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for (irow=0;irow < A->numRows * A->row_block_size;irow++) |
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out[irow] = 0; |
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} |
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/* do the operation: */ |
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if (ABS(alpha)>0) { |
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if (A ->col_block_size==1 && A->row_block_size ==1) { |
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/* TODO: parallelize (good luck!) */ |
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#pragma omp single |
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for (icol=0;icol< A->pattern->numOutput;++icol) { |
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#pragma ivdep |
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for (iptr=A->pattern->ptr[icol]-1;iptr<A->pattern->ptr[icol+1]-1; ++iptr) { |
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out[A->pattern->index[iptr]-1]+= alpha * A->val[iptr] * in[icol]; |
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} |
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} |
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} else if (A ->col_block_size==2 && A->row_block_size ==2) { |
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/* TODO: parallelize */ |
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#pragma omp single |
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for (ic=0;ic< A->pattern->numOutput;ic++) { |
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for (iptr=A->pattern->ptr[ic]-1;iptr<A->pattern->ptr[ic+1]-1; iptr++) { |
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ir=2*(A->pattern->index[iptr]-1); |
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out[ ir] += alpha * ( A->val[iptr*4 ]*in[ic] + A->val[iptr*4+2]*in[1+ic] ); |
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out[1+ir] += alpha * ( A->val[iptr*4+1]*in[ic] + A->val[iptr*4+3]*in[1+ic] ); |
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ksteube |
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} |
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} |
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} else if (A ->col_block_size==3 && A->row_block_size ==3) { |
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/* TODO: parallelize */ |
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#pragma omp single |
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for (ic=0;ic< A->pattern->numOutput;ic++) { |
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#pragma ivdep |
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for (iptr=A->pattern->ptr[ic]-1;iptr<A->pattern->ptr[ic+1]-1; iptr++) { |
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ir=3*(A->pattern->index[iptr]-1); |
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out[ ir] += alpha * ( A->val[iptr*9 ]*in[ic] + A->val[iptr*9+3]*in[1+ic] + A->val[iptr*9+6]*in[2+ic] ); |
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out[1+ir] += alpha * ( A->val[iptr*9+1]*in[ic] + A->val[iptr*9+4]*in[1+ic] + A->val[iptr*9+7]*in[2+ic] ); |
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out[2+ir] += alpha * ( A->val[iptr*9+2]*in[ic] + A->val[iptr*9+5]*in[1+ic] + A->val[iptr*9+8]*in[2+ic] ); |
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ksteube |
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} |
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} |
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} else { |
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/* TODO: parallelize */ |
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#pragma omp single |
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for (ic=0;ic< A->pattern->numOutput;ic++) { |
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for (iptr=A->pattern->ptr[ic]-1;iptr<A->pattern->ptr[ic+1]-1; iptr++) { |
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for (irb=0;irb< A->row_block_size;irb++) { |
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irow=irb+A->row_block_size*(A->pattern->index[iptr]-1); |
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#pragma ivdep |
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for (icb=0;icb< A->col_block_size;icb++) { |
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icol=icb+A->col_block_size*ic; |
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out[irow] += alpha * A->val[iptr*A->block_size+irb+A->row_block_size*icb] * in[icol]; |
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} |
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} |
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} |
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} |
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} |
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} |
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return; |
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} |
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/* CSR format with offset 0*/ |
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void Paso_SparseMatrix_MatrixVector_CSR_OFFSET0(double alpha, |
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Paso_SparseMatrix* A, |
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double* in, |
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double beta, |
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double* out) |
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{ |
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register index_t ir,icol,iptr,icb,irb,irow,ic,Aiptr; |
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register double reg,reg1,reg2,reg3,in1,in2,in3,A00,A10,A20,A01,A11,A21,A02,A12,A22; |
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if (ABS(beta)>0.) { |
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if (beta != 1.) { |
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#pragma omp for private(irow) schedule(static) |
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for (irow=0;irow < A->numRows * A->row_block_size;irow++) |
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out[irow] *= beta; |
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} |
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} else { |
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#pragma omp for private(irow) schedule(static) |
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for (irow=0;irow < A->numRows * A->row_block_size;irow++) |
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out[irow] = 0; |
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} |
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if (ABS(alpha)>0) { |
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if (A ->col_block_size==1 && A->row_block_size ==1) { |
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#pragma omp for private(irow,iptr,reg) schedule(static) |
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for (irow=0;irow< A->pattern->numOutput;++irow) { |
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reg=0.; |
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#pragma ivdep |
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for (iptr=(A->pattern->ptr[irow]);iptr<(A->pattern->ptr[irow+1]); ++iptr) { |
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reg += A->val[iptr] * in[A->pattern->index[iptr]]; |
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} |
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out[irow] += alpha * reg; |
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} |
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} else if (A ->col_block_size==2 && A->row_block_size ==2) { |
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#pragma omp for private(ir,reg1,reg2,iptr,ic,Aiptr,in1,in2,A00,A10,A01,A11) schedule(static) |
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for (ir=0;ir< A->pattern->numOutput;ir++) { |
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reg1=0.; |
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reg2=0.; |
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#pragma ivdep |
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for (iptr=A->pattern->ptr[ir];iptr<A->pattern->ptr[ir+1]; iptr++) { |
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ic=2*(A->pattern->index[iptr]); |
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Aiptr=iptr*4; |
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in1=in[ic]; |
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in2=in[1+ic]; |
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A00=A->val[Aiptr ]; |
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A10=A->val[Aiptr+1]; |
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A01=A->val[Aiptr+2]; |
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A11=A->val[Aiptr+3]; |
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reg1 += A00*in1 + A01*in2; |
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reg2 += A10*in1 + A11*in2; |
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} |
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out[ 2*ir] += alpha * reg1; |
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out[1+2*ir] += alpha * reg2; |
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} |
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} else if (A ->col_block_size==3 && A->row_block_size ==3) { |
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#pragma omp for private(ir,reg1,reg2,reg3,iptr,ic,Aiptr,in1,in2,in3,A00,A10,A20,A01,A11,A21,A02,A12,A22) schedule(static) |
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for (ir=0;ir< A->pattern->numOutput;ir++) { |
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reg1=0.; |
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reg2=0.; |
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reg3=0.; |
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#pragma ivdep |
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for (iptr=A->pattern->ptr[ir];iptr<A->pattern->ptr[ir+1]; iptr++) { |
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ic=3*(A->pattern->index[iptr]); |
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Aiptr=iptr*9; |
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in1=in[ic]; |
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in2=in[1+ic]; |
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in3=in[2+ic]; |
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A00=A->val[Aiptr ]; |
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A10=A->val[Aiptr+1]; |
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A20=A->val[Aiptr+2]; |
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A01=A->val[Aiptr+3]; |
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A11=A->val[Aiptr+4]; |
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A21=A->val[Aiptr+5]; |
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A02=A->val[Aiptr+6]; |
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A12=A->val[Aiptr+7]; |
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A22=A->val[Aiptr+8]; |
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reg1 += A00*in1 + A01*in2 + A02*in3; |
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reg2 += A10*in1 + A11*in2 + A12*in3; |
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reg3 += A20*in1 + A21*in2 + A22*in3; |
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} |
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out[ 3*ir] += alpha * reg1; |
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out[1+3*ir] += alpha * reg2; |
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out[2+3*ir] += alpha * reg3; |
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} |
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} else { |
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#pragma omp for private(ir,iptr,irb,icb,irow,icol,reg) schedule(static) |
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for (ir=0;ir< A->pattern->numOutput;ir++) { |
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for (iptr=A->pattern->ptr[ir];iptr<A->pattern->ptr[ir+1]; iptr++) { |
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for (irb=0;irb< A->row_block_size;irb++) { |
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irow=irb+A->row_block_size*ir; |
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reg=0.; |
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#pragma ivdep |
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for (icb=0;icb< A->col_block_size;icb++) { |
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icol=icb+A->col_block_size*(A->pattern->index[iptr]); |
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reg += A->val[iptr*A->block_size+irb+A->row_block_size*icb] * in[icol]; |
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} |
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out[irow] += alpha * reg; |
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} |
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} |
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} |
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} |
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} |
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return; |
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} |
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/* CSR format with offset 1*/ |
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void Paso_SparseMatrix_MatrixVector_CSR_OFFSET1(double alpha, |
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Paso_SparseMatrix* A, |
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double* in, |
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double beta, |
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double* out) { |
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register index_t ir,icol,iptr,icb,irb,irow,ic; |
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register double reg,reg1,reg2,reg3; |
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#pragma omp barrier |
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if (ABS(beta)>0.) { |
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if (beta != 1.) { |
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#pragma omp for private(irow) schedule(static) |
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for (irow=0;irow < A->numRows * A->row_block_size;irow++) |
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out[irow] *= beta; |
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} |
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} else { |
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#pragma omp for private(irow) schedule(static) |
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for (irow=0;irow < A->numRows * A->row_block_size;irow++) |
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out[irow] = 0; |
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} |
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/* do the operation: */ |
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if (ABS(alpha)>0) { |
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if (A ->col_block_size==1 && A->row_block_size ==1) { |
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#pragma omp for private(irow,iptr,reg) schedule(static) |
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for (irow=0;irow< A->pattern->numOutput;++irow) { |
| 310 |
|
|
reg=0.; |
| 311 |
|
|
#pragma ivdep |
| 312 |
|
|
for (iptr=(A->pattern->ptr[irow])-1;iptr<(A->pattern->ptr[irow+1])-1; ++iptr) { |
| 313 |
|
|
reg += A->val[iptr] * in[A->pattern->index[iptr]-1]; |
| 314 |
|
|
} |
| 315 |
|
|
out[irow] += alpha * reg; |
| 316 |
|
|
} |
| 317 |
|
|
} else if (A ->col_block_size==2 && A->row_block_size ==2) { |
| 318 |
|
|
#pragma omp for private(ir,reg1,reg2,iptr,ic) schedule(static) |
| 319 |
|
|
for (ir=0;ir< A->pattern->numOutput;ir++) { |
| 320 |
|
|
reg1=0.; |
| 321 |
|
|
reg2=0.; |
| 322 |
|
|
#pragma ivdep |
| 323 |
|
|
for (iptr=A->pattern->ptr[ir]-1;iptr<A->pattern->ptr[ir+1]-1; iptr++) { |
| 324 |
|
|
ic=2*(A->pattern->index[iptr]-1); |
| 325 |
|
|
reg1 += A->val[iptr*4 ]*in[ic] + A->val[iptr*4+2]*in[1+ic]; |
| 326 |
|
|
reg2 += A->val[iptr*4+1]*in[ic] + A->val[iptr*4+3]*in[1+ic]; |
| 327 |
|
|
} |
| 328 |
|
|
out[ 2*ir] += alpha * reg1; |
| 329 |
|
|
out[1+2*ir] += alpha * reg2; |
| 330 |
|
|
} |
| 331 |
|
|
} else if (A ->col_block_size==3 && A->row_block_size ==3) { |
| 332 |
|
|
#pragma omp for private(ir,reg1,reg2,reg3,iptr,ic) schedule(static) |
| 333 |
|
|
for (ir=0;ir< A->pattern->numOutput;ir++) { |
| 334 |
|
|
reg1=0.; |
| 335 |
|
|
reg2=0.; |
| 336 |
|
|
reg3=0.; |
| 337 |
|
|
#pragma ivdep |
| 338 |
|
|
for (iptr=A->pattern->ptr[ir]-1;iptr<A->pattern->ptr[ir+1]-1; iptr++) { |
| 339 |
|
|
ic=3*(A->pattern->index[iptr]-1); |
| 340 |
|
|
reg1 += A->val[iptr*9 ]*in[ic] + A->val[iptr*9+3]*in[1+ic] + A->val[iptr*9+6]*in[2+ic]; |
| 341 |
|
|
reg2 += A->val[iptr*9+1]*in[ic] + A->val[iptr*9+4]*in[1+ic] + A->val[iptr*9+7]*in[2+ic]; |
| 342 |
|
|
reg3 += A->val[iptr*9+2]*in[ic] + A->val[iptr*9+5]*in[1+ic] + A->val[iptr*9+8]*in[2+ic]; |
| 343 |
|
|
} |
| 344 |
|
|
out[ 3*ir] += alpha * reg1; |
| 345 |
|
|
out[1+3*ir] += alpha * reg2; |
| 346 |
|
|
out[2+3*ir] += alpha * reg3; |
| 347 |
|
|
} |
| 348 |
|
|
} else { |
| 349 |
|
|
#pragma omp for private(ir,iptr,irb,icb,irow,icol,reg) schedule(static) |
| 350 |
|
|
for (ir=0;ir< A->pattern->numOutput;ir++) { |
| 351 |
|
|
for (iptr=A->pattern->ptr[ir]-1;iptr<A->pattern->ptr[ir+1]-1; iptr++) { |
| 352 |
|
|
for (irb=0;irb< A->row_block_size;irb++) { |
| 353 |
|
|
irow=irb+A->row_block_size*ir; |
| 354 |
|
|
reg=0.; |
| 355 |
|
|
#pragma ivdep |
| 356 |
|
|
for (icb=0;icb< A->col_block_size;icb++) { |
| 357 |
|
|
icol=icb+A->col_block_size*(A->pattern->index[iptr]-1); |
| 358 |
|
|
reg += A->val[iptr*A->block_size+irb+A->row_block_size*icb] * in[icol]; |
| 359 |
|
|
} |
| 360 |
|
|
out[irow] += alpha * reg; |
| 361 |
|
|
} |
| 362 |
|
|
} |
| 363 |
|
|
} |
| 364 |
|
|
} |
| 365 |
|
|
} |
| 366 |
|
|
return; |
| 367 |
|
|
} |
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